excamera, what I'm hacking on, daily.

jamesb@excamera.com

About clocks
I wrote down some ideas about deriving an arbitrary frequency clock in VHDL. This must be well known to hardware people, but wasn't completely obvious to me until I thought about it.

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Housecleaning
Fixed a few issue with the CPU: made it reset cleanly, made sure it still fits in the smallest Spartan II FPGA, the XC2S15. Shrank the IP code - now down to 612 instructions with debug, 450 without.

I started looking seriously at TCP last night. I think that a safe first step is to send a TCP reset.

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