The ordered dither matrix in Verilog

The ordered dither matrix is a 2n × 2n matrix. The 2 × 2 matrix is

0   2 3   1

and the 4 × 4 matrix is

0   8   2   10 12   4   14   6 3   11   1   9 15   7   13   5

In software a lookup table is often used, but in hardware deriving the dither value is straightforward.

Separating the 2 × 2 matrix into powers of two makes the pattern clearer:

0   2 3   1    =    0   2 2   0    +    0   0 1   1

So the Verilog to compute this dither value from the x,y pixel coordinates is:

wire [1:0] odith = {x[0] ^ y[0], y[0]};

Similarly for the 4 × 4 matrix:

0   8   2   10 12   4   14   6 3   11   1   9 15   7   13   5    =    0   8   0   8 8   0   8   0 0   8   0   8 8   0   8   0    +    0   0   0   0 4   4   4   4 0   0   0   0 4   4   4   4    +    0   0   2   2 0   0   2   2 2   2   0   0 2   2   0   0    +    0   0   0   0 0   0   0   0 1   1   1   1 1   1   1   1

which can be computed directly with:

wire [3:0] odith = {x[0] ^ y[0], y[0], x[1] ^ y[1], y[1]};

and similarly the 8 × 8 dither is:

wire [5:0] odith = {x[0] ^ y[0], y[0], x[1] ^ y[1], y[1], x[2] ^ y[2], y[2]};
0    48    12    60    3    51    15    63 32    16    44    28    35    19    47    31 8    56    4    52    11    59    7    55 40    24    36    20    43    27    39    23 2    50    14    62    1    49    13    61 34    18    46    30    33    17    45    29 10    58    6    54    9    57    5    53 42    26    38    22    41    25    37    21