project = gameduino-200a
vendor = xilinx
family = spartan3s
part = xc3s200a-4vq100
# part = xc3s200an-4ftg256
top_module = top
flashsize = 2048

vfiles = ../verilog/top.v ../../j1demo/verilog/ck_div.v ../../j1demo/verilog/uart.v ../../j1demo/verilog/rams.v ../verilog/fifo.v ../verilog/j0.v ../verilog/generated.v
# vfiles = ../verilog/testtop.v

include xilinx.mk