The ordered dither matrix in Verilog

The ordered dither matrix is a 2n×2n matrix. The 2×2 matrix is

0 2     3 1

and the 4×4 matrix is

0 8 2 10         12 4 14 6         3 11 1 9         15 7 13 5

In software a lookup table is often used, but in hardware deriving the dither value is straightforward.

Separating the 2×2 matrix into powers of two makes the pattern clearer:

0 2     3 1  =  0 2     2 0  +  0 0     1 1

So the Verilog to compute this dither value from the x,y pixel coordinates is:

wire [1:0] odith = {x[0] ^ y[0], y[0]};

Similarly for the 4×4 matrix:

0 8 2 10         12 4 14 6         3 11 1 9         15 7 13 5  =  0 8 0 8         8 0 8 0         0 8 0 8         8 0 8 0  +  0 0 0 0         4 4 4 4         0 0 0 0         4 4 4 4  +  0 0 2 2         0 0 2 2         2 2 0 0         2 2 0 0  +  0 0 0 0         0 0 0 0         1 1 1 1         1 1 1 1

which can be computed directly with:

wire [3:0] odith = {x[0] ^ y[0], y[0], x[1] ^ y[1], y[1]};

and similarly the 8×8 dither is:

wire [5:0] odith = {x[0] ^ y[0], y[0], x[1] ^ y[1], y[1], x[2] ^ y[2], y[2]};
0 32 8 40 2 34 10 42                 48 16 56 24 50 18 58 26                 12 44 4 36 14 46 6 38                 60 28 52 20 62 30 54 22                 3 35 11 43 1 33 9 41                 51 19 59 27 49 17 57 25                 15 47 7 39 13 45 5 37                 63 31 55 23 61 29 53 21